Computer-based electronic systems are ubiquitous in modern technologies. These computer-based systems typically have a processing unit (CPU) coupled to memory for storing instructions and data which are “consumed” by the CPU and a multiplicity of peripheral devices that serve to connect the CPU to the external environment. These peripheral devices may provide mass storage, user input/output (I/O), instrumentation and data collection, and the like. Connections between the various peripheral devices and the CPU may be effected via a network on which the CPU (typically through a network bridge) and the peripheral devices reside. One such industry standard network bus which is widely used is the Peripheral Component Interconnect (PCI), and its current version, Peripheral Component Interconnect Express (PCIe).
PCIe is a tree-based architecture with a root node (or root complex) and end-point nodes coupled thereto via one or more switches. Because of the tree-based architecture, PCIe may be susceptible to single-point failures (SPF) in which a failure on an intermediate link segment isolates the end-point nodes that are distal to the point of failure relative to the root node. In safety-critical applications, such as may be found in airborne or other vehicular computer system deployments, the susceptibility to single-point failures, and the mitigation thereof, may be a safety issue.